Trigger Interface
Module
DAQ III Overview
Data-Mover
CLEO III Data-Boards
Fastbus
The CLEO III Driftchamber, the CsI calorimeter and the muon system will be
read-out using a single Fastbus module, the LeCroy 1877 TDC. Charge to Time
converters are added for pulse height measurements.
VME bus
The CLEO III DAQ group designs a generic VME Data-Board to be used by the
silicon vertex detector, the RICH and by the trigger system. This data-board
includes a VME interface supporting D64 BLT, chained block transfers (CBLT),
and Multicast cycles (MCST) as defined by
VIPA .
For each channel the data-board contains a 8-event buffer memory and a Data-Path
chip for sparsification (zero suppression, threshold comparison) and re-tagging
of channel identifiers. A Buffer-Manager chip provides overall control and buffer
chaining during readout.
The RICH group is finishing its first
prototype board.
It will used in a beam test in spring 1997.
The
PCB layout is finished.
Picture Gallery (Postscript)
Block Diagram of Data-Path Chip
Timing Diagram of Data-Path Chip operating at 80 MHz
Block Diagram of Buffer-Manager Chip
Trigger Interface
Module
DAQ III Overview
Data-Mover
CLEO WEB PAGES
Updated: Jan. 20, 1997
Author: Andreas H. Wolf (ahw@mps.ohio-state.edu)